As a practicing engineer, I spend a lot of time developing space or other high-reliability applications. I mention this because we need...

A few weeks ago, we looked at the new Bluespec RISC-V core which is deployed on an Arty A7-100T. I was curious to see how easy it would...

One of the many advantages to using an embedded Linux solution is the lower-level drivers are often part of the kernel. This saves us...

There are several FPGA use cases where a softcore processor is beneficial to the overall solution. These can include anything from...

Having an embedded Linux operating system is critical for Xilinx heterogeneous SoCs to be able to achieve their full potential. The...

On my explorations with the Kria board so far, all the imaging has been using a web camera over USB. Of course, we also can capture...

I have talked about my love of PYNQ for rapid prototyping of applications both commercially and for fun projects on several occasions in...

We have looked at many development boards that are based on Xilinx FPGAs and SoCs during the eight years this blog has been running....

The Kria KV260 Vision AI Starter Kit is great for embedded vision applications and AI acceleration. Several of my clients, however, have...

With the release of the 2020.x tool chains, PetaLinux was updated to support Distro Boot. If you are not familiar with Distro Boot, its...

A few weeks ago, Xilinx released Vitis AI 1.4. This was around the same time I was working on a project with the Kria SOM for a client on...

Over the years, several blogs and projects have leveraged the Vivado and Vitis ability to generate example projects. One of the most...

The first-ever MPSoC I received to work and create blogs with was an engineering sample of the UltraZed-EG in red. It worked well, but...

If I’m being honest, my university classes on control engineering were not my favorite. However, working as an engineer – and especially...

It’s interesting how often I seem to go through similar development projects with different clients. Within a short period of time...

Back on the 29th September 2013, I sat down and wrote what would become the first blog in this series. It was a simple look at how to...

One Research and Development project, I have been working on over the last eight months with a long-time friend is an agricultural robot...

Last week we examined several techniques for generating non-integer clock divisions in our FPGA if no PLL was available or we couldn’t...

Modern FPGA devices really spoil us. They include PLLs, DCM, DSP etc. and a range of interfaces that significantly ease our developments....

Over the last two months, I have had several clients approach me for help regarding DDR3 / DDR3L interfaces that they have connected to...