MicroZed Chronicles: High Speed Debugging of Logic.

One of the key messages I am keen to always stress is that we should simulate our designs, before testing them in hardware. However there still exists times when we need to observe the design in operation within the FPGA.

For this we can of course use ILAs and we have recently looked in depth at using ILA in our Hackster projects (ILA and UltraScale and ILA and Versal). While ILA are great, there also exists times when we want to observe larger data samples or stream high speed data out from our systems.

Recently I was at the Design Automation Conference, and came across Exostiv labs who develop a probe especially for this situation. The Exostiv probe uses unused Gigabit Transceivers within your design to capture and stream out (depending on your GT and clock settings) data from within your FPGA design.

As we do a lot of image and signal processing I thought this would be a good tool to invest in (I am keen on investing in tools which allow us to be more productive).

Of course once it arrived I thought I would create a simple test application to understand the development flow. I also thought it would make a pretty interesting blog as there are a lot of things we can do with the captured data.

For example if you are developing a image processing system, it is possible to use the probe to connect to the AXI Stream which transfers data between processing blocks and verify the output of the algorithm at each point, e.g. we can capture the pixels of a frame or frames and post process them to recreate the image.

The tool itself is split into two elements the core inserter which is capable of inserting the core into the Vivado design and the client which connects to the design in the hardware and captures the signals.

Starting with the core inserter to be able to use it we need to be connected to Vivado, there is a simple button which can be added to Vivado to link with the core inserter. Then within the core insertor we are able to select the GT we wish to use, configure the clock an line rate along which determining which of the GT is used for configuring the target in the device for triggering etc. To be able to link with Vivado we must have a the synthesised design open.

Once linked to Vivado we can just like working with an ILA, select the clock we wish to use and the signals we wish to capture and trigger on.

The final stage of the core insertion is to insert the core into the Vivado design, it can run the implementation as well following this if you desire.

With the core inserted we can then connect the probe to the hardware and start debugging the application.

For this simple example I used a KCU105 board and inside the design I implemented a Test Pattern Generator which was writing its application into the memory under the control of a MicroBlaze V. This means we can probe and stream the video from the TPG, as the KCU105 has dual SFP+ connectors we can use two of the four provided SFP+ cables for the data streaming.

As you would expect the clock rate, number of signals you wish to capture and the GT settings determine if it is possible to stream results directly from the target. If streaming is not possible we are able to store samples in memory and upload them into the viewer.

For this case however we can stream the video pretty simply out of the KCU105, using the dual SFP+.

This provides us with a clear ability to capture video data and observe the output and if we want to post process the results using python etc.

In this example we can zoom in and see the pixel contents for the frame along with the side band signals which control the end of line indication etc.

This is the first time I have used the Exostiv probe the out of box experience was straight forward I could insert the core simply and then connect to and debug the application with ease.

We will be using this on several projects over the coming months, my initial feeling is it will have been worth the investment.

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