MicroZed Chronicles: Getting to Grips with DSP in FPGA, Part Two

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Just over a year ago I wrote a blog which pulled together the DSP resources I had created over the years, covering the foundations such as fixed and floating point maths, rounding, the CORDIC algorithm, working with ADCs and DACs, and an introduction to filters and the frequency domain.

Since then, driven largely by the DSP for FPGA course I have been developing, the series has grown considerably. Over the last few months we have built DFTs, FFTs, IIR filters and CIC filters from scratch, looked at some very useful supporting techniques, and even taken the FFT beyond a single spectrum. While in a real project we might just drop in an IP core in the interest of time, I think it is good that we are able to understand the logic and the basics, now more than ever.

I thought it would be a good idea to pull the series together in one place.

Transforms from First Principles

The place to start is the DFT from scratch, to keep the logic easy to follow we used an eight point example, which needs nothing more than two nested loops and a small table of twiddle factors taken from the unit circle at 45 degree intervals, quantised in Q10 format. A simple Python script generates the golden reference, and the RTL results correlate nicely. The catch, of course, is scaling, a DFT of size N needs N squared complex multiplications, so a 1024 point DFT requires over a million of them.

This is where the FFT from scratch comes in, the key point is that the FFT is not a different transform, it produces exactly the same result as the DFT while exploiting the symmetry and periodicity of the twiddle factors to remove redundant work. At the heart of it sits the butterfly, which takes two complex inputs and produces two outputs from a single multiplication, addition and subtraction. For our eight point example this reduces 64 complex multiplications to just 12 butterfly operations across three stages, with the bit reversed input ordering costing essentially nothing in an FPGA as it is simply a rewiring of address bits. The blog also looks at word growth through the stages and why the fixed point results differ from the floating point reference by an LSB or two, which is the behaviour we need to understand when verifying fixed point DSP against floating point models.

Filtering

While I have looked at FIR filters several times over the years, IIR filters offer a sharper cut-off for fewer resources, at the cost of potential instability and a phase response which is not perfectly linear. The blog works through the biquad structures (Direct Form I, Direct Form II and the transposed Direct Form II, which is generally the best performer in an FPGA), explains stability in terms of poles and the unit circle, and then designs a second order Butterworth low pass filter, sampled at 200 MHz with a 30 MHz cut-off, using the bilinear transform with pre-warping. The implementation uses the VHDL fixed point packages and follows the UltraFast guidelines to make good use of the DSP48 registers, and simulation shows the expected roll off, with an 80 MHz tone attenuated by 17.9 dB while a 10 MHz tone passes untouched.

Alongside frequency selection, one of the most common challenges in DSP is changing the sample rate, whether that is decimating a delta-sigma modulator or PDM microphone stream, or interpolating a baseband signal up to a DAC rate. This is where CIC filters shine, first described by Hogenauer in 1981, the CIC performs large rate changes using nothing but adders, subtractors and registers, no multipliers and no coefficient storage. The blog builds both a decimator and an interpolator in VHDL and covers the concepts which tend to trip people up, sizing the internal word width using Hogenauer's equation, letting the integrators wrap (two's complement arithmetic is mandatory here), recovering the (RM)^N gain by slicing the output, and budgeting for a small compensation FIR if the sinc shaped passband droop matters in your application. Both test benches are self-checking VHDL-2008, so they run in XSIM, GHDL, Questa or any other modern simulator.

Useful Techniques Along the Way

Not everything in the series is a filter or a transform. Linear interpolation is one of the most useful techniques in FPGA design, underpinning sensor linearisation, gamma correction, waveform generation and function approximation. The trick is choosing the spacing between the interpolation points as a power of two, which turns the division into a simple right shift. A 16 bit input can then be split into an eight bit lookup table address and an eight bit fractional position, and the whole thing maps onto a BRAM, a subtractor, a single DSP block, a shift and an adder, no divider is required.

Slightly more left field is the EML operator, prompted by an arXiv paper and being tagged lots on social media. EML defines eml(x, y) = exp(x) - ln(y) and shows that, combined with the constant 1, it can construct every elementary function, rather like a NAND gate for mathematics. Mathematical universality does not imply hardware efficiency, however, as every node in an EML tree is itself a multi-cycle, resource hungry operation. The blog instead restructures the idea into a microcoded mathematical processor, a single EML unit with a stack, program ROM and FSM, implemented in HLS and fitting comfortably in a small Spartan-7. Not a go-to approach, but a useful one to keep in the toolbox where flexibility matters more than throughput.

Beyond a Single Spectrum

The most recent blog in the series, Looking Beyond the FFT, steps back from implementation and asks what we do with FFT frames once we have them. A single spectrum is a snapshot with no history, which is fine for a stationary tone but useless against signals which sweep, hop or pulse. Using the Opal Kelly XEM7320 fitted with a SYZYGY ADC pod, sampling at 40 MS/s into a 4096 point FFT in the fabric, we added the missing dimension of time with a waterfall display. Under a swept stimulus the waterfall does not just show you a spur, it tells you what kind of spur it is, with harmonics running at multiples of the fundamental slope while images reflect about Nyquist. Frequency hopping and time gated bursts, which are indistinguishable from intermittent interference in individual captures, become unmistakable. It converts the FFT from an instrument which answers what is present into one which answers what is happening.

Wrapping Up

Looking back over the series, a few common threads stand out. Every design starts with a simple Python golden reference, every implementation comes with a self-checking test bench, and fixed point effects such as word growth, truncation and rounding are shown as design considerations rather than afterthoughts. All of the code is available on my GitHub if you want to work through the examples yourself.

If you are just getting started, I would suggest beginning with the original Getting to Grips with DSP in FPGA blog for the mathematical foundations, then working through the DFT, FFT and filter blogs in that order. I also still highly recommend The Scientist and Engineer's Guide to DSP as a companion text.

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