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MicroZed Chronicles: 10 Years and 500 Posts

In September 2013, I was about to start a new role, as head of electronics at a space imaging developer when what should arrive in the post than a “Adam Taylor Edition” MicroZed from Steve Leibson who was then at Xilinx and was starting a new blog. This MicroZed edition was only the second hardware I had received, the other being a ZedBoard. Steve sent me the board as I had been for many years a regular contributor to the Xilinx Xcel Journal and had blogged for a now defunct platform called all programmable planet.

Steve told me he would publish anything I wrote on the MicroZed, so I set off thinking I’d write one or two blogs explaining how to get the MicroZed up and running. Those “one or two” blogs grew to a few more related blogs on FPGA design and exploring different hardware. Fast forward to a decade later and here I am writing the 500th MicroZed Chronicles post.

Looking back at these 500 blog posts, they not only enabled monumental change in my professional life and skills, but they also inadvertently chronicled the 10 most exciting years in FPGA development in my opinion as we moved from more traditional FPGA devices to true heterogeneous system-on-chip based solutions. This transition has been monumental for two reasons: first being the actual devices and second being the software we use to develop FPGAs (yes, I know there is a still a long way to go).

Zynq, Zynq MPSOC and Versal each had a step change over its predecessor, moving from Dual Core Cortex A9s to Quad core A53s, Dual Core A5s and GPU in MPSoC to Versals Dual Core A72, R5S, AI Engines and network-on-chip. Of course, it’s not only been within the SoC arena that we have seen developments. Devices now provide very flexible interfacing for example MIPI DPHy, Complex embedded hard macros with PCIe, along with XADC / SysMon and Gigabit Transceivers which have gone from 3Gbps range to greater than 100 Gbps.

Comparing today’s versions of development tools to the earlier versions of Vivado, SDK and PetaLinux that I used in the beginning is amazing. Vivado has matured very well and provides developers with a range of complex free IP, and great capabilities for creating complex designs from IP integrator to Isolation flow (safety and security) and Partial Reconfiguration (design and device flexibility).

Another great achievement in the last decade is that the flow for developing a MicroBlaze, Zynq, Zynq MPSoC or even Versal processing system is fundamentally the same now, which reduces learning curves and simplifies design implementation for developers.

One of the clear trends of the last 10 years has been an attempt to lift the level of abstraction that developers are working at. This has increased productivity but also widened the talent pool able to develop solutions target system-on-chips. It is crucial to work at a higher level of abstraction for large devices, I predict the next 10 years will see quite a interest in abstraction and model based design.

The MicroZed Chronicles has also seen High Level Synthesis (HLS) come of age, helping to accelerate development and leverage levels of abstraction. HLS was a concept I first saw demonstrated in the very early 2000’s with Celoxica with its Handel C language, sadly it was just a little (well 10 years) too early.

HLS enabled the release of SDSoC which evolved to Vitis Accelerated flow, which provides an acceleration flow (with significant libraries) for system-on-chip devices. This provides the developer the ability to move SW functions to the programmable logic to clear bottlenecks and increase performance, enabling them to focus on their application challenges and not the underlaying technology implementation.

One of my favourite “abstraction” innovations in the last 10 years must be the PYNQ framework, which really opened up rapid prototyping and test for SoC devices. As PYNQ enables Python to control programmable logic designs opening up the world of Python and Jupyter notebooks / Labs to the developer. In my view PYNQ is one of the most exciting frameworks AMD has released.

MZ Chronicles has even tracked AI adoption picking up pace across the embedded systems industry, with the Deep Learning Processor Unit IP in recent years and Vitis AI, which works with popular frameworks such as PyTorch and TensorFlow, and comes with a range of pre trained models in its own Vitis AI Model Zoo.

The last decade and 500 posts have also been quite a ride personally. When I wrote the first blog, I still had a full-time job and was only able to spend Sundays with the MicroZed, thinking I’d write maybe a handful of posts on the topic. As I write this week’s post in 2023, the Chronicles have become one of the most popular repositories of knowledge to help engineers who want to learn and get started with FPGAs and can tolerate the writing styles (or lack thereof) of an engineer. They also serve as a large notebook which I can look back at and look up things when working on new projects. I’m also a founder of my own FPGA / Embedded Systems consultancy, Adiuvo Engineering & Training, with 4 full-time engineers and several freelance engineers. I named the company Adiuvo based on the Latin word to help, aid and assist and now my team and I get to follow our passions everyday helping clients do everything from FPGA to board design and software across some of the most interesting applications like Space and New Space (we are currently working on ESA Plato and NSAS/ESA Gateway).

NONE of this would have been possible without the supportive readers of MicroZed Chronicles throughout the years.

The MicroZed Chronicles also opened the doors to creating in-depth projects on for people to learn from. The last time I checked I was blown away that I’ve reached nearly half a million views there now! Another interesting off shoot of the blog are webinars and online workshops. I still remember how VERY nervous I was the first time we did one on the Ultra96 board. Fast forward a few years later and now I’ve got a whole range of webinars covering everything from Introduction to Vivado to Vitis HLS and more. You can find all the recorded webinars on Adiuvo’s website by clicking on the workshops tab.

Above all that has come out of MicroZed Chronicles the last decade, I appreciate most the relationships and engagement with so many professional FPGA and FPGA makers out in the wild. It is great to go to conferences and events and bump into people who read the chronicles and talk about FPGA. I cannot reiterate enough how much you readers have changed my life and helped more people become interested in FPGAs.

Thank you!

What’s next for MicroZed Chronicles going forward? Designing, developing, teaching and writing our way to number 1000 of course!

Workshops and Webinars

If you enjoyed the blog why not take a look at the free webinars, workshops and training courses we have created over the years. Highlights include

Embedded System Book

Do you want to know more about designing embedded systems from scratch? Check out our book on creating embedded systems. This book will walk you through all the stages of requirements, architecture, component selection, schematics, layout, and FPGA / software design. We designed and manufactured the board at the heart of the book! The schematics and layout are available in Altium here Learn more about the board (see previous blogs on Bring up, DDR validation, USB, Sensors) and view the schematics here.



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