Estimating Engineering Projects
Developing complex systems is a risky business; around one third of all complex engineering projects will fail; two-thirds of engineering...
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ADIUVO ENGINEERING BLOG
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Adam Taylor
- Aug 16
- 9 min
MicroZed Chronicles: IOCTL SPI, I2C and PetaLinux
Regular readers of this blog and my Hackster projects will note that I tend to use either bare metal applications or PYNQ when developing...
Adam Taylor
- Aug 2
- 4 min
MicroZed Chronicles: Introducing AMD Spartan™ UltraScale+™ FPGAs
One of the great things about programmable logic is its versatility. It is at the heart of a range of systems from handheld embedded...
Adam Taylor
- Aug 1
- 2 min
Graduate FPGA Engineer Role.
Adiuvo are looking for a graduate engineer to join our awesome team to help develop FPGA, Embedded Software and Electronics. About Adiuvo...
Adam Taylor
- Jul 12
- 4 min
MicroZed Chronicles: UltraScale and UltraScale+ Clock Division
Last week we looked at how we could use 7 series clocking resources to provide integer clock division without using MMCM. In this week’s...
Adam Taylor
- Jul 5
- 3 min
MicroZed Chronicles: Clock Structures and Clock Division
Many of our FPGA designs are multi-clock, meaning several clocks within the design, which can introduce clock domain crossing challenges....
Adam Taylor
- Jun 21
- 5 min
MicroZed Chronicles: 10 Years and 500 Posts
In September 2013, I was about to start a new role, as head of electronics at a space imaging developer when what should arrive in the...
Adam Taylor
- Jun 7
- 4 min
MicroZed Chronicles: Ethernet on the Digilent Arty A7
A couple of weeks ago I was emailed about how to get the ethernet working on the Digilent Arty A7 development board. We have covered this...
Adam Taylor
- May 31
- 3 min
MicroZed Chronicles: Sneak Peek Analog Discovery 3
Over the years working as both a FPGA developer and author of this blog, I have found it very useful to have a range of test equipment....
Adam Taylor
- May 24
- 4 min
MicroZed Chronicles: FPGA Development Life Cycle
In this blog, we often talk about detailed design features or aspects of FPGA or heterogeneous SoC design. This allows us to learn about...
Adam Taylor
- May 17
- 3 min
MicroZed Chronicles: Dynamic Clocking
Clocking is at the heart of every FPGA design.. We can spend a lot less time battling the tools if we get the clock architecture right,...
Adam Taylor
- May 3
- 3 min
MicroZed Chronicles: Digilent Eclypse Z7 Board
There is a wide range of development boards on the market today. Some are ideal for beginners who are just learning programmable logic or...
Adam Taylor
- Apr 26
- 3 min
MicroZed Chronicles: Vivado Simulator Code and Functional Coverage
While writing the HDL is often the easy element of FPGA development, the most challenging and time-consuming element can be verification....
Adam Taylor
- Apr 5
- 4 min
MicroZed Chronicles: Glitch Filtering
Our programmable logic designs are often deployed in applications which can be electrically noisy. This noise can affect the signals that...
Adam Taylor
- Mar 29
- 4 min
MicroZed Chronicles: Getting Started Part Three
Lately we have been discussing helpful tips and tricks, the best development boards and even the best books to reference if you’re...
Adam Taylor
- Jan 11
- 8 min
MicroZed Chronicles: From UART to AXI Lite Debug Access
Last week we examined how we could create a UART with AXI Stream interfaces to enable access to AXI buses in device for debugging. In...
Richard Harriss
- Jan 9
- 5 min
High-speed serial transceivers in PolarFire FPGAs
Introduction As part of our ongoing series of blog posts on high-speed serial transceivers we are going to look at how to create a...
Adam Taylor
- Jan 6
- 4 min
Lattice Propel RISC-V, Part Two Software Development.
A few weeks ago, we examined how we could create the hardware element of a RISC-V processor using Lattices Propel tool. The culmination...
Adam Taylor
- Dec 30, 2022
- 3 min
Using RPI Pico for System & FPGA Integration
Several times in recent blogs and posts on LinkedIn and Twitter I have mentioned that at Adiuvo we use a lot of RPI Pico’s for hardware...
Richard Harriss
- Dec 15, 2022
- 9 min
High-speed transceivers in Xilinx FPGAs
Introduction It is a common problem in FPGA design to have to send high-bandwidth data (such as video) between two different FPGAs. ...
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