MicroZed Chronicles: Introducing Vitis Unified IDE
If you’ve been working with Vitis 2023.1, you’ll already be aware that a new Vitis Unified Integrated Design Environment (IDE) was...
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Adam Taylor
- Sep 5
- 3 min
MicroZed Chronicles: Artix UltraScale+ and Opal Kelly XEM8320
We have created projects and blogs on most AMD families over the years but have never created one for the Artix UltraScale+ (AUP) FPGA....
Richard Harriss
- Aug 24
- 13 min
Estimating Engineering Projects
Developing complex systems is a risky business; around one third of all complex engineering projects will fail; two-thirds of engineering...
Adam Taylor
- Aug 15
- 9 min
MicroZed Chronicles: IOCTL SPI, I2C and PetaLinux
Regular readers of this blog and my Hackster projects will note that I tend to use either bare metal applications or PYNQ when developing...
Adam Taylor
- Aug 9
- 3 min
MicroZed Chronicles: ILA Debugging Outside IP Integrator
We have used Integrated Logic Analysers (ILA) several times in our blogs and Hackster projects to ensure our designs are working as...
Adam Taylor
- Aug 1
- 2 min
Graduate FPGA Engineer Role.
Adiuvo are looking for a graduate engineer to join our awesome team to help develop FPGA, Embedded Software and Electronics. About Adiuvo...
Adam Taylor
- Jul 11
- 4 min
MicroZed Chronicles: UltraScale and UltraScale+ Clock Division
Last week we looked at how we could use 7 series clocking resources to provide integer clock division without using MMCM. In this week’s...
Adam Taylor
- Jul 5
- 3 min
MicroZed Chronicles: Clock Structures and Clock Division
Many of our FPGA designs are multi-clock, meaning several clocks within the design, which can introduce clock domain crossing challenges....
Adam Taylor
- Jun 20
- 5 min
MicroZed Chronicles: 10 Years and 500 Posts
In September 2013, I was about to start a new role, as head of electronics at a space imaging developer when what should arrive in the...
Adam Taylor
- Jun 14
- 3 min
MicroZed Chronicles: Power Design Manager
Designing a successful system requires not only the implementation of the algorithms within the programmable logic and processing systems...
Adam Taylor
- Jun 6
- 4 min
MicroZed Chronicles: Ethernet on the Digilent Arty A7
A couple of weeks ago I was emailed about how to get the ethernet working on the Digilent Arty A7 development board. We have covered this...
Adam Taylor
- May 31
- 3 min
MicroZed Chronicles: Sneak Peek Analog Discovery 3
Over the years working as both a FPGA developer and author of this blog, I have found it very useful to have a range of test equipment....
Adam Taylor
- May 24
- 4 min
MicroZed Chronicles: FPGA Development Life Cycle
In this blog, we often talk about detailed design features or aspects of FPGA or heterogeneous SoC design. This allows us to learn about...
Adam Taylor
- May 9
- 7 min
MicroZed Chronicles: Working with ADCs and DACs
Recently I’ve shared several projects on Hackster which are based around digital filters, math and signal processing. One common element...
Adam Taylor
- Apr 23
- 3 min
Coral Micro Dev Board
Along side FPGA development I am also interested in Microprocessors, especially those which can be used for edge applications. A few...
Adam Taylor
- Apr 19
- 3 min
MicroZed Chronicles: A look at the DSP58
We looked at fixed point math a few weeks ago and we’ve also previously looked at how we can use DSP48 in both 7 series and UltraScale+...
Adam Taylor
- Apr 5
- 4 min
MicroZed Chronicles: Glitch Filtering
Our programmable logic designs are often deployed in applications which can be electrically noisy. This noise can affect the signals that...
Adam Taylor
- Mar 29
- 4 min
MicroZed Chronicles: Getting Started Part Three
Lately we have been discussing helpful tips and tricks, the best development boards and even the best books to reference if you’re...
Adam Taylor
- Mar 1
- 4 min
MicroZed Chronicles: Which Dev Board to Start With?
One of the questions I get asked a lot is which development board is the best for (beginner) FPGA and SOC development. Understandably,...
Adam Taylor
- Feb 22
- 4 min
MicroZed Chronicles: SW Development with Vitis and Visual Studio Code
A lot of my FPGA development takes place within Visual Studio Code where I use it with TerosHDL to create HDL and cocotb for...
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