MicroZed Chronicles: Integration and Debugging System
Over the last few weeks, we have been working to create a simple system which allows debugging from a UART into an AXI Lite network. This...
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ADIUVO ENGINEERING BLOG
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Adam Taylor
- Jan 18
- 3 min
MicroZed Chronicles: Which Cost Optimized Device?
For many applications, selecting the most appropriate device is critical. Many of our clients are often questioning which device they...
Adam Taylor
- Jan 11
- 8 min
MicroZed Chronicles: From UART to AXI Lite Debug Access
Last week we examined how we could create a UART with AXI Stream interfaces to enable access to AXI buses in device for debugging. In...
Richard Harriss
- Jan 9
- 5 min
High-speed serial transceivers in PolarFire FPGAs
Introduction As part of our ongoing series of blog posts on high-speed serial transceivers we are going to look at how to create a...
Adam Taylor
- Jan 6
- 4 min
Lattice Propel RISC-V, Part Two Software Development.
A few weeks ago, we examined how we could create the hardware element of a RISC-V processor using Lattices Propel tool. The culmination...
Adam Taylor
- Jan 4
- 6 min
MicroZed Chronicles: System Integration and Debugging
As we know, FPGA design and FPGA verification are complex businesses. Then, of course, comes integration, at which time the actual...
Adam Taylor
- Dec 30, 2022
- 3 min
Using RPI Pico for System & FPGA Integration
Several times in recent blogs and posts on LinkedIn and Twitter I have mentioned that at Adiuvo we use a lot of RPI Pico’s for hardware...
Adam Taylor
- Dec 21, 2022
- 5 min
MicroZed Chronicles: GTH Clocking
Last week we looked at configuring and deploying multi-gigabit GTH transceivers using the GTH wizard. One of the key things when using...
Richard Harriss
- Dec 15, 2022
- 9 min
High-speed transceivers in Xilinx FPGAs
Introduction It is a common problem in FPGA design to have to send high-bandwidth data (such as video) between two different FPGAs. ...
Adam Taylor
- Dec 14, 2022
- 8 min
MicroZed Chronicles: Chat GPT and AI coding.
A few months ago, we looked at GitHub Copilot. The tool uses AI to assist with the coding process and it felt a little like pair...
Adam Taylor
- Dec 7, 2022
- 6 min
MicroZed Chronicles: UltraScale+ IO, ODELAY3E and Cascading
We looked recently at the UltraScale+ IO resources which provide a range of capabilities that can be very effective in addressing both...
Richard Harriss
- Nov 30, 2022
- 5 min
Doing FPGA Cheaper, Better, Faster– Yes You Can Do All Three
Model-based engineering enables engineers to cut down development times by a factor of 5 while maintaining the highest levels of quality.
Adam Taylor
- Nov 30, 2022
- 3 min
MicroZed Chronicles: ZU1CG Board and Click Interface
One of the great features about the new Avnet ZU1CG board is the interfacing it provides. It gives us three SYZYGY interfaces along with...
Adam Taylor
- Nov 23, 2022
- 3 min
MicroZed Chronicles: Free Webinars, Workshops, Tutorials and App Notes
One of my passions is sharing information about how we can develop better, more effective FPGA designs. This passion is the driving force...
Adam Taylor
- Nov 16, 2022
- 3 min
MicroZed Chronicles: Stream FIFO
A few months ago, we looked at the AXI Stream FIFO. The AXI Steaming FIFO allows developers to be able to access AXI Streams from AXI...
Adam Taylor
- Nov 15, 2022
- 1 min
New Professional FPGA Development and Design Courses – Now Available
Announcing 3 new FPGA development-related courses, including a basics course targeted at new graduates or entry-level engineers.
Adam Taylor
- Nov 14, 2022
- 3 min
Lattice Propel RISC-V, part one Hardware
Over the last few weeks, I have been working on commissioning the Nexus Certus™-NX LFD2NX-40 development board. You can find a previous...
Adam Taylor
- Nov 9, 2022
- 3 min
MicroZed Chronicles: New Artix and Zynq UltraScale+ Family Members
It is always exciting when new devices are introduced, and this week, AMD Xilinx announced two new devices into the already popular Artix...
Adam Taylor
- Nov 2, 2022
- 2 min
MicroZed Chronicles: 7 Series DDR3 Debugging
It’s common for many custom FPGA board developments to contain a DDR3 memory. Of course, when we develop a custom board, we need to...
Adam Taylor
- Oct 26, 2022
- 2 min
MicroZed Chronicles: Video Frame Read Buffer
Last week we examined the Video Frame Buffer Write (VFBW), which is capable of writing image frames to an external memory. This week, we...
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