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MicroZed Chronicles: Zynq UltraScale+ MPSoC PMU Fault Handling

We’ve looked at the platform management unit (PMU) on the Zynq UltraScale+ MPSoC several times before and especially for inter-process interrupts and power management.

I was recently on a call with a client and they asked me about the error management of the Zynq UltraScale+ MPSoC using the PMU.

The PMU is the heart of the MPSoC when it comes to handling errors and how they are handled The response can range from a custom response to a predefined default action such as PoR, SRST, or indicating PS Error output.

In this blog, we are going to create an error condition and show how to create a simple error handler. To do this, however, we must first learn a little about the PMU firmware which can be generated by Vitis. This firmware runs on the PMU and has several different modules which can be enabled and compiled depending on the status of compiler flags. Modules that can be included within the PMU firmware include watchdog restart, error management, power management, and software test libraries. A full list of these modules can be is detailed on the PMU firmware wiki page.

To get started with this demonstration, we are going to create a new Vivado design for a Zynq MPSoC-based board. In this instance, I am using the ZUBoard. Once the processor has been instantiated and the block automation completed within IP integrator, re-customize the Zynq MPSoC and enable the errors to and from the PMU on the PS-PL interface.

This will add two new ports to the Zynq MPSoC block diagram. One port for the PL to signal errors to the PMU and the other which reports the status of errors within the PMU for the PL to observe and take action if required.

Add a Virtual IO IP clock to the PMU error input and add an ILA to the output. Both of these can be clocked from the PL clock.

With this completed, we can build the Vivado project and then export the XSA to Vitis.

Next, within Vitis, we need to create a new application project which targets the PMU. At the template screen, select the option for PMU firmware. This will generate the PMU firmware in its default configuration which we can use as a base for this example.

The first thing we need to do is change set the compilation flag to enable the error handling module.

With this added, the next time we compile the PMU firmware it will include the error handling module which will run under the control of the scheduler.

The main areas of change for this example are the files xpfw_error_manager.c. This contains a look up table for each possible error ID.

Each of these entries provides a register mask, handler, type, action and change permissions.

We need to find the error ID we are working with within this structure. In this case, we are looking for the PL errors. In the structure entry for the PL error, we are going to update the handler to indicate the function to call. This function will be contained within the file xpfw_mod_em.c. I have called it PLErrHanfler. I have also changed the action from EM_ACTION_PSERR (which would assert the PS error to being EM_ACTION_CUSTOM) to indicate that we will be taking custom actions.

Within the error handler in xpfw_mod_em.c, I created a new function which prints out to the terminal when an error occurs.

Compile this application and download the firmware to the target using the debugger. Next open a serial terminal and you will observe the initial start-up sequence of the PMU firmware.

Back in Vivado, open the hardware manager and refresh the view if necessary. Using the Virtual IO (VIO), set one of the errors to a logic one.

Observe that The serial port includes the error message which is output when the PL error occurs since we just defined it in the SW.

We can also see that the reporting of the error on the PMU error vector passed to the PL.

As we change the VIO back to logic zero, we will see that the error is cleared on both the terminal output and the ILA.

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While this is a simple example, it shows how we can use the PMU to respond to errors within our system (e.g Watchdog, time outs etc.).

We will take a closer look at the PMU, power management, and error management over the coming weeks!



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