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Adam Taylor
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Join date: Jun 6, 2025
Posts (360)
Dec 31, 2025 ∙ 4 min
MicroZed Chronicles: 2025 What a Year!
Today is the last day of 2025, and it has been a remarkably busy one. At this time last year, I had no idea just how busy, but also how productive, this year would turn out to be. Let’s take a look at some numbers, and remember this is before including any client engineering work. 52 blogs , one technical blog written each week. Some of my favourites this year include Leveraging Performance , The FPGA Turns 40 , and Design Reuse . 21 Hackster projects , each exploring an FPGA or SoC...
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Dec 26, 2025 ∙ 5 min
Powering FPGAs Without the Headaches: Evaluating the MCP16701 PMIC
Alongside the design and development of FPGA applications, we also design FPGA- and microprocessor-based boards, for example our tile range, development boards, and tile carrier cards . One of the key aspects we consider is how we are able to power the FPGA or microprocessor. Powering FPGAs or microprocessors can be a challenge, as we often require low voltages that are very stable while supplying high currents. Sequencing requirements also come to the fore, with the need to sequence rails in...
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Dec 24, 2025 ∙ 4 min
MicroZed Chronicles: RF Signal Processing
Over the twelve years of this blog, we have looked at many different tools for developing FPGA and SoC designs. Many we use often, such as Vivado, Vitis, and PetaLinux. Others, over the years, have been merged into or evolved into new products, for example SDSoC. One tool we have only touched on is Vitis Model Composer. This add-on for MATLAB and Simulink provides developers with a number of HDL and HLS blocks which can be connected to create FPGA solutions. Vitis Model Composer makes...
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