MicroZed Chronicles: SFP, SFP+ and QSFP

FPGAs are great, they allow us to process data at rates unachievable by any other means. However, this comes with a challenge: we need to be able to get data on and off the device to support that processing.

While the high-performance IO and XPIO of AMD devices are very capable of operating at high bandwidth, for some applications we need to operate much faster. This is where gigabit transceivers come into their own, allowing ultra-fast transmission and reception of data.

To get the best interfacing flexibility, these transceivers are often combined with interface modules that enable media-specific transceivers to be used.

What this means is that, depending on the application, we can use a specific interface module in our design. For example, if we are using 10G Ethernet, we can use a dedicated 10G interface module. The most popular of these interface module standards is the Small Form-Factor Pluggable (SFP), which you will find on both development and production boards.

If you are not familiar with it, an SFP module is a hot-pluggable interface module that allows us to connect gigabit transceivers with high-speed cables and fiber. The SFP standard used depends on the required data rate.

Before we look at the standards, let’s examine the signals provided on an SFP interface:

• TX – Differential transmit data

• RX – Differential receive data

• I²C (SCL and SDA) – Serial interface providing information and configuration data on the SFP module

• TX Disable – Driving this signal high disables the optical output

• RX LOS – Indicates the receiver has lost lock

• RS[0:1] – Optional rate select signals that enable a change of line rate

In the simplest FPGA implementation, we can easily connect to an SFP using a single transceiver and a couple of logic-level signals. The simplest design just needs TX Disable under control.

For SFP, each interface uses a single gigabit transceiver pair (TX and RX). In our solutions we are most likely to see either:

• SFP+ – Supports line rates up to 10 Gbps

• SFP28 – Supports line rates up to 28 Gbps

Standard SFP supports line rates of only 1 Gbps, so it is less common in high-speed FPGA applications. SFP28 is backward compatible with SFP+, but be careful with standard SFP modules, 1 Gbps is the minimum for SFP+ and SFP28.

Recently, we have been using SFP+ for several applications. We examined using SFP with the Exostiv probe, and we also looked at Aurora and Chip2Chip protocols.

One real-world application we developed recently uses Aurora to send XADC data as fast as possible from one device to another. The SFP provides the necessary electrical isolation by enabling transmission over fiber between Artix-7 FPGAs.

Of course, some solutions need line rates above 28 Gbps—for example, 100G Ethernet. In this instance, we can leverage multiple GT lanes and use a Quad Small Form-Factor Pluggable (QSFP) module.

In its base format, QSFP+ is designed to support four 10 Gbps lines, providing a 40 Gbps link. QSFP28 leverages four 28 Gbps lanes to implement 100 Gbps, ideal for 100G Ethernet. QSFP also offers line rates above 28 Gbps, supporting up to 400 Gbps using QSFP112, which leverages four 112 Gbps lanes as provided by Versal Premium GTM transceivers.

Looking across the development boards in the lab, several of them contain a wide variety of SFP and QSFP configurations.

As SFP+/SFP28 and QSFP are very common in the FPGA world, it is always a good idea to have some SFP/QSFP loopback modules available in the lab for testing. These enable us to clearly and easily see if links are established without the need for a second board. We can, of course, do internal loopback, but the board is only truly tested if we loop back at the connector.

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