We have created projects and blogs on most AMD families over the years but have never created one for the Artix UltraScale+ (AUP) FPGA. The Artix UltraScale+ sits within the cost-optimized portfolio and offers developers some really interesting capabilities.
The AUP family of devices provides between 80K and 300K LUTs in addition to transceivers capable of running at line rates between 12.5 Gbps and 16.3 Gbps depending upon the package. AUP devices are available in an Integrated Fan-Out (InFO) package which enables the removal of the substrate and allows for the reduced board area and height. When compared to chip scale packaging, it reduces the size by 70% and height by 73%.
If we are doing image processing, the AUP is the first in the cost-optimized portfolio to offer integrated MIPI DPhy support. This removes the need for external resistor networks and increases the data rate supported which enables faster frame rates or increased revolutions.
I recently received the Opal Kelly XEM8320 development platform to better familiarize myself with AUP devices. Included in this development platform is an AU25P device which provides developers with 308,437 logic cells, 300 BRAM blocks, 1200 DSP elements, and 12 GTY transceivers.
The XEM8320 utilizes the resources of the AU25P to provide developers with a very effective development board with a host of features and capabilities:
1 GB of DDR4 arranged for 16-bit access
2 SFP+ interfaces
4 standard SYZYGY interfaces
2 transceiver SYZYGY interfaces
SMA GTY TX, RX and clock
On board JTAG, provided via USB C
Front panel interface via USB C
One of the really exciting things about Opal Kelly development boards is FrontPanel SDK. This is combination of IP which is integrated within the FPGA and SDK and provides controllability and observability within the FPGA design. To achieve this, FrontPanel consists of several elements including SDK, HDL, firmware, API and application. We will look at FrontPanel in more detail in a more dedicated blog soon.
If we want to get started with the XEM8320 we can install Vivado board files via the Vivado board store.
This allows us to start working with the board nicely. Once we create a block diagram, we also see support for most of the peripherals on the board tab.
If we want to use these peripherals, we can then simply drag and drop them onto the block design. This is exactly what I did for my first design on this board – meaning I created a MicroBlaze system which ran from the DDR4 on the board.
Since I wanted to save FrontPanel for a later blog, I used the JTAG for a simple Hello World application in this example.
As would be expected, implementing a MicroBlaze and DDR4 controller does not take a lot of the available resources.
Running simple software on Vitis will show the output of the Hello World from the MicroBlaze.
While back in Vivado we are able to explore the DDR4 timings and windows via the hardware manager.
This interesting development board provides a very capable device and breaks out much of the IO to the SZYZGY interfaces. This provides flexibility for prototyping of the solution because SZYZGY peripherals are available and provide a wide range of capabilities from cameras to sensor and ADC and DAC peripherals.
I have a few SZYZGY modules which I will use to create a more complex application with FrontPanel soon.
Workshops and Webinars
If you enjoyed the blog why not take a look at the free webinars, workshops and training courses we have created over the years. Highlights include
Introduction to Vivado learn how to use AMD Vivado
Ultra96, MiniZed & ZU1 three day course looking at HW, SW and Petalinux
Arty Z7-20 Class looking at HW, SW and Petalinux
Mastering MicroBlaze learn how to create MicroBlaze solutions
HLS Hero Workshop learn how to create High Level Synthesis based solutions
Perfecting Petalinux learn how to create and work with petalinux OS
Embedded System Book Do you want to know more about designing embedded systems from scratch? Check out our book on creating embedded systems. This book will walk you through all the stages of requirements, architecture, component selection, schematics, layout, and FPGA / software design. We designed and manufactured the board at the heart of the book! The schematics and layout are available in Altium here Learn more about the board (see previous blogs on Bring up, DDR validation, USB, Sensors) and view the schematics here.
Sponsored by AMD