In this final instalment looking at the Alveo U55C I want to explore how we can work with the Alveo U55C using Python. Using this approach is possible for several applications from image and signal processing to hardware in the loop.
To demonstrate how we can work with Python, I am going to use the adapted card management system in which I originally created and then modified to include a AXI GPIO and ILA. For the remainder of the blog I am going to focus on using the Alveo U55C for hardware in the loop testing of and a custom IP module. This provides all of the necessary features required to demonstrate the wider range of applications while providing a comprehensive example.
Within the card management system block design we are provided with both AXI Lite and AXI interfaces. This enables us to use the AXI Lite interface to configure registers and read status information from within the custom IP modules registers, while the AXI interface allows large data transfers using DMA.
In our card management system example design, the AXI lite network is connected to several elements including the HBM temperature and the additional GPIO added in. This GPIO provides a scratch pad which can be accessed by the AXI Lite interface. The AXI interface is connected to a BRAM which again provides an excellent example for the DMA transfers we would require in this demonstration.
To get started with this example we will need to have the Jupyter labs installed and prior to opening Jupyter lab we need to have installed the XDMA Drivers. We can do this by running the load_drivers script in the tests area of the XDMA repo cloned previously. We also need to have programmed the Alveo board over JTAG with the U55C card management system.
With the XDMA drivers installed we can double check they are loaded by running the lspci command.
We are now in a position to start developing our application in Jupyter labs. To get started we need to open the jupyter labs with elevated permissions as we want to access hardware.
To do this use the command sudo jupyter-lab –allow-root open the note book in a browser.
The approach we are going to take within our notebook is to use the python operating system interfaces to be able to open, close, read and write using xdma0_user, xdma0_c2h_0, and xdma0_h2c_0 for this application.
As we need to be able to transfer and receive binary data, we will also be using pythons struct module to pack and unpack the data from binary.
To get started we are going to first read and write from the AXI Lite interface, we will first open the xdma axi lite for read and write operations.
I will then set the write data pattern I wish to write to the AXI GPIO, and pack this into a binary element. I use little endian and ‘l’ which represents a long integer which is typically 4 bytes in size.
With the data formatted correctly we are then able to perform the write, the 0x60000 is the address of the AXI GPIO on the AXI Lite network, this reports 4 bytes have been written.
To double check we have written the correct value we can read back the data using the read function read.
Of course we can also double check we are correct suing the ILA
We can of course also do a similar approach on the xdma0_c2h_0 and xdma0_h2c_0 interfaces to transfer data over the AXI4 interface into the BRAM of course we have to adapt to the interface width of the AXI bus. However, instrumenting the design with a ILA on the AXI4 interface shows the transactions from the python script as we would expect.
This shows we can easily interact with our Alveo card or any other AMD device which uses the XDMA drivers over PCIe using python. This enables us to easily stimulate and analyse data for custom IP modules we have deployed into the Alveo card.
Next time in our look at Alveo we are going to be looking at something rather special.
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