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Lately we have been discussing helpful tips and tricks, the best development boards and even the best books to reference if you’re...

Over the years, we have looked at many different verification frameworks like cocotb and varying approaches when working with AMD AXI...

In addition to questions about the best beginner development boards , I am often asked which books I recommend for FPGA developers just...

One of the first articles I ever wrote was about how FPGAs perform fixed-point math. Understanding this is important because FPGA-based...

One of the questions I get asked a lot is which development board is the best for (beginner) FPGA and SOC development. Understandably,...

A lot of my FPGA development takes place within Visual Studio Code where I use it with TerosHDL to create HDL and cocotb for...

We often use finite state machines (FSM) when we want to implement control structures in our programmable logic structures. As complexity...

When we are verifying a design or bringing it up on a board, it’s not uncommon for either reset or clocking issues to cause it to not...

A few weeks ago, we looked at what to do if you experience issues with DDR3 when bringing up a new board. In this blog, we are going to...

Over the last few weeks, we have been working to create a simple system which allows debugging from a UART into an AXI Lite network ....

For many applications, selecting the most appropriate device is critical. Many of our clients are often questioning which device they...

Last week we examined how we could create a UART with AXI Stream interfaces to enable access to AXI buses in device for debugging. In...

Introduction As part of our ongoing series of blog posts on high-speed serial transceivers we are going to look at how to create a...

A few weeks ago, we examined how we could create the hardware element of a RISC-V processor using Lattices Propel tool. The culmination...

As we know, FPGA design and FPGA verification are complex businesses. Then, of course, comes integration, at which time the actual...

Several times in recent blogs and posts on LinkedIn and Twitter I have mentioned that at Adiuvo we use a lot of RPI Pico’s for hardware...

Last week we looked at configuring and deploying multi-gigabit GTH transceivers using the GTH wizard. One of the key things when using...

Introduction It is a common problem in FPGA design to have to send high-bandwidth data (such as video) between two different FPGAs. ...

A few months ago, we looked at GitHub Copilot. The tool uses AI to assist with the coding process and it felt a little like pair...

We looked recently at the UltraScale+ IO resources which provide a range of capabilities that can be very effective in addressing both...