MicroZed Chronicles: ZynqBerry Zero
The Trenz ZynqBerry Zero is in the same form factor as the Raspberry Pi Zero, but with a Zynq Z-7010. Let's take a closer look.
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Adam Taylor
- Nov 26, 2020
- 3 min
MicroZed Chronicles: Taking a Look Inside the Tektronix TBS1052C
I need an entry-level scope for a project I am working on so I decided I would pick up a Tektronix TBS1052C and take look at what is inside.
Adam Taylor
- Nov 18, 2020
- 3 min
MicroZed Chronicles: Using Analysis View in Vitis and Vivado
One of the most useful views available in both Vivado HLS and Vitis HLS is the analysis view.
Adam Taylor
- Nov 12, 2020
- 3 min
MicroZed Chronicles: Free Virtual Workshops On-Demand
This past summer, I was lucky to present several detailed virtual workshops on Vivado, PYNQ, Vitis, and more. They are available on-demand.
Adam Taylor
- Nov 4, 2020
- 3 min
MicroZed Chronicles: AXI Stream Verification IP
The AXI Stream VIP is extremely useful when we want to generate signal and image processing IP that use AXI Stream for interfacing.
Adam Taylor
- Oct 28, 2020
- 4 min
MicroZed Chronicles: Verifying AXI Peripherals
The designs we implement in Vivado often use AXI interfaces. These might be AXI Lite for configuration and control, AXI Memory Mapped
Clive "Max" Maxfield
- Oct 23, 2020
- 9 min
How to Get an Engineering Job and Keep It (Part 2)
In this column, we’re going to ponder the creation of a resume (a.k.a. curriculum vitae, commonly referred to as a CV) and the joys of being
Adam Taylor
- Oct 19, 2020
- 4 min
Using SLX FPGA in Vitis bottom up flow
Last year, I examined SLX FPGA and used it to optimize IP Cores for implementation in Vivado looking at security and industrial algorithms.
Adam Taylor
- Oct 16, 2020
- 3 min
Derating and Part Stress Analysis
One design analysis technique used when designing these types of systems is to perform a Part Stress analysis.
Clive "Max" Maxfield
- Oct 9, 2020
- 6 min
How to Get an Engineering Job and Keep It (Part 1)
This column will focus on the early days at high school, college, and university. Part 2 will concentrate on getting your first job
Adam Taylor
- Oct 7, 2020
- 3 min
MicroZed Chronicles: A look at the new Trenz TE0802
I recently received the new Trenz TE0802 development board, designed and manufactured by Digilent partner Trenz Electronic.
Adam Taylor
- Sep 30, 2020
- 4 min
MicroZed Chronicles: Vivado Simulator Interface – Using C Test Benches on HDL
For complex algorithms, it is often a good idea to first create a model which defines the algorithm’s behavior.
adam@adiuvoengineering.com
- Sep 23, 2020
- 4 min
MicroZed Chronicles: Introduction to RTL Simulation and XSIM
No matter how captured (RTL, HLS, Model Driven), all programmable logic designs should start with agreed requirements that define the...
Adam Taylor
- Sep 16, 2020
- 3 min
MicroZed Chronicles: RTL Design Verification Techniques
So, before we look in more detail at Vivado XSIM, let’s first understand the entire verification landscape and what we are trying to achieve
Adam Taylor
- Sep 9, 2020
- 3 min
MicroZed Chronicles: UltraFast Design Methodologies
Using Xilinx UltraFast design methodologies can offer significant benefits when implementing designs.
Adam Taylor
- Sep 2, 2020
- 3 min
MicroZed Chronicles: Quality of Result
In this blog we explore the Quality of Result Assessment (QoRA) and Quality of Result Suggestions (QoRS).
Adam Taylor
- Sep 1, 2020
- 3 min
How to Install Vitis
This blog will break down step-by-step how to download and install the Vitis IDE from Xilinx.
Adam Taylor
- Aug 26, 2020
- 4 min
MicroZed Chronicles: Design Analysis Report
One of the most time-consuming elements of implementing an FPGA design is not often the design capture, but achieving timing performance.
Adam Taylor
- Aug 19, 2020
- 3 min
Saying Hello World with the Alveo U200 Accelerator Card
In this blog we will take a look at how run an executable program on the Alveo U200 card.
Adam Taylor
- Aug 12, 2020
- 3 min
MicroZed Chronicles: How do you Architect Your Programmable Logic Designs?
In most of the blogs I write, I demonstrate or explain an FPGA or SoC design technique. This one, however, is going to be a little...
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