Regular readers of this blog will know that I am a big fan of PYNQ, it is one of the easiest to use frameworks, which opens up the capabilities of programmable logic. Most of my experience with PYNQ to date has been working with Heterogeneous SoC such as the Zynq and Zynq MPSoC. However, if we are developing for the Alveo card we can also leverage PYNQ using the Xilinx Run Time (XRT).
To get started with PYNQ on Alveo we first need to make sure we have the latest XRT installed, if you are not sure how to do this run though the instructions outlined here.
The reason we need to use XRT is because projects flow for Alveo PYNQ applications is to leverage the Acceleration flow which uses Vitis. To me this is very exciting as it opens up the world of the Vitis Accelerated libraires while at the same time enabling us to interact with the implementation in the logic of those libraries using python.
To get started with PYNQ on the Alveo flow is very straight forward, the first thing we need to do is install PYNQ using a terminal
pip install pynq
Once that has been completed we are then free to download the PYNQ examples and the PYNQ Notebooks.
pip install pynq-alveo-examplespynq get-notebooksAs with all PYNQ development we create our solutions using jupyter notebooks. If the host machine does not already have Jupyter already installed we need to install it.
pip install notebook
With all of these elements installed we are able to take a look and explore the examples designs which come with PYNQ. Of course, the first is the classic VADD example which is supplied as a Vitis template. The only real difference between the PYNQ for embedded SoC and Avleo is the download is not a bit file but the XCLBin.
Along with the simple “hello world” examples the notebooks downloaded also show several complex examples which include the leveraging the data compression libraries form the Vsitis accelerated libraires and of course notebooks which walk you through working with PYNQ and the Bitstreams. Also provided are several in depth notebooks which look at kernel optimization techniques, interfacing with streams and working with memory.
Of course being an engineer I took the opportunity to rebuild the simple VADD example as this is the first time I had used the Vitis flow to generate a target for the U55C. This XCLBin generated as part of this process we can replace and use in the PYNQ experimentation.
However this does open up a interesting opportunity as the Host machine has Vitis installed and the U55C platform both of which I just used to create the new XCLBin.
Here we can exploit the Vitis command line to build an updated XCLBin for any of our projects, using the Jupyter note book which keeps the development environment tightly integrated.
We can even perform emulation of the accelerated hardware in the PYNQ Environment, along with implementing some of the optimizations we have learned in other notebooks before building the hardware.
The PYNQ flow of course is not ever application but it can prove very useful when you are developing and commissioning. As such it should be remembered as a tool in your tool box when you are working with Alveo devices.
Workshops and Webinars
If you enjoyed the blog why not take a look at the free webinars, workshops and training courses we have created over the years. Highlights include
Professional PYNQ Learn how to use PYNQ in your developments
Introduction to Vivado learn how to use AMD Vivado
Ultra96, MiniZed & ZU1 three day course looking at HW, SW and Petalinux
Arty Z7-20 Class looking at HW, SW and Petalinux
Mastering MicroBlaze learn how to create MicroBlaze solutions
HLS Hero Workshop learn how to create High Level Synthesis based solutions
Perfecting Petalinux learn how to create and work with PetaLinux OS
Embedded System Book
Do you want to know more about designing embedded systems from scratch? Check out our book on creating embedded systems. This book will walk you through all the stages of requirements, architecture, component selection, schematics, layout, and FPGA / software design. We designed and manufactured the board at the heart of the book! The schematics and layout are available in Altium here Learn more about the board (see previous blogs on Bring up, DDR validation, USB, Sensors) and view the schematics here.
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