MicroZed Chronicles: What Have I Done Over the Last 6 Months?
- May 27
- 5 min read
FPGA Horizons London- October 6th and 7th 2026 - get Tickets here.
The $99 Artix UltraScale+ Explorer Board - learn more here
2026 is flying by, and my original plan was to write several summary blogs about what I had been doing each month. I thought these might be interesting to engineers considering going freelance or setting up their own company. So, in this blog, I thought it would be a good idea to talk about the different projects and activities we have been involved with over the last six months.
I would say the last six months have been focused on several distinct areas.
Image Processing
We have developed two client solutions based around image processing: one containing multiple cameras and another using a single camera. I have also published one image-processing Hackster project.

A little while ago, we standardised on the ZCU106 for image-processing developments, and I think that has been a really good choice. It allows us to create and prototype solutions before moving to the target board, which is often custom. The ZCU106 provides developers with a wide range of application possibilities and greatly reduces project risk during the early stages of development.
RFSoC
RFSoC projects have also become a significant focus for us. One of these includes the development of a board for the ZCU111, which should hopefully be arriving early next week for commissioning.
Spurred on by this, I also wrote a simple “getting started” project for the ZCU111 on Hackster. In the blog, we also took a look at the Knowledge Resources KRM-2ZV67DR and its carrier card.
While not directly RFSoC-related, I have also spent a large part of this year helping a large defence client address issues with an RF-processing FPGA that has been experiencing bring-up problems.


Industrial and Scientific Control
We are also closing in on the end of one of those projects that both the client and I thought would be fast and easy. Of course, it turned out not to be quite as simple as we originally hoped.
However, it has been a very interesting project, requiring us to send data across a fibre link with minimal latency in order to maintain control of a very high-performance scientific instrument. At first glance, getting an ADC value to another DAC and updating it between two FPGAs sounds relatively straightforward, but, as with many engineering problems, the devil is in the detail.

This project is also a great example of where development boards really come into their own. Using two 7-series boards, we were able to connect the systems together, add the DAC on an FMC card, test the end-to-end delay, and significantly reduce overall project risk.
Explorer Board
Of course, one of the most exciting developments of the last six months has been the development of the Explorer Board.

Conceived at the beginning of March during a random conversation, the board was designed, reviewed, contracts negotiated, subjected to SI/PI analysis (see the 12.5 Gbps eye below), and prototypes sent out for manufacture by the 8th of May.

I have big plans for this board, as I think it hits a very nice sweet spot by offering a large, high-performance FPGA, good interface options, and a very attractive price point.
AI
AI is, of course, an increasingly interesting area. We have been working on an AI-based verification project with Japeto and the European Space Agency.
This AI system, called Certiqo, is designed to shine a spotlight on areas of a design where requirements might not have been implemented. Hopefully, Certiqo will enable developers to quickly “lint” their code against requirements before proceeding to more formal verification and simulation.
There is also a simple video showing the progress to date.
Public Projects
On the public-project side, we have spent a lot of the first half of the year looking at how we can debug heterogeneous systems using techniques such as Vitis functional simulation, RTL simulation of the AIE, and hardware-in-the-loop verification.
One of my favourite projects, however, has been the recreation of the F-14 CADC, the first microprocessor. I also talked about this recently at FPGA Horizons, and we are currently trying to build a 3D-printed F-14 model to demonstrate the swing-wing capabilities.
FPGA Horizons
Of course, we also held the first FPGA Horizons US event just outside Boston, which was an amazing success with a lot of great FPGA discussion and networking opportunities.
We have also launched two issues of the FPGA Horizons Journal, and tickets are now available for FPGA Horizons UK in October.


We might also have a surprise event in the US later in the year as well.
Lose Ends
Along with the above we have also found ourselves doing a lot of work with the Alveo V80 and recently updated the Spartan 7 development board to contain the S7-50 a much larger FPGA than previsouly fitted. during the update we also developed DVI Pmods for Tx and Rx along with a ethernet Pmod which is a supported by a RTL stack.



Looking Ahead
The next six months look just as busy and will hopefully continue to provide great FPGA adventures and interesting projects to work on.
FPGA Conference
FPGA Horizons London- October 6th and 7th 2026 - get Tickets here.
FPGA Journal
Read about cutting edge FPGA developments, in the FPGA Horizons Journal or contribute an article.
Workshops and Webinars:
If you enjoyed the blog why not take a look at the free webinars, workshops and training courses we have created over the years. Highlights include:
Upcoming Webinars Timing, RTL Creation, FPGA Math and Mixed Signal
Professional PYNQ Learn how to use PYNQ in your developments
Introduction to Vivado learn how to use AMD Vivado
Ultra96, MiniZed & ZU1 three day course looking at HW, SW and PetaLinux
Arty Z7-20 Class looking at HW, SW and PetaLinux
Mastering MicroBlaze learn how to create MicroBlaze solutions
HLS Hero Workshop learn how to create High Level Synthesis based solutions
Perfecting Petalinux learn how to create and work with PetaLinux OS
Boards
Get an Adiuvo development board:
Adiuvo Embedded System Development board - Embedded System Development Board
Adiuvo Embedded System Tile - Low Risk way to add a FPGA to your design.
SpaceWire CODEC - SpaceWire CODEC, digital download, AXIS Interfaces
SpaceWire RMAP Initiator - SpaceWire RMAP Initiator, digital download, AXIS & AXI4 Interfaces
SpaceWire RMAP Target - SpaceWire Target, digital download, AXI4 and AXIS Interfaces
Embedded System Book
Do you want to know more about designing embedded systems from scratch? Check out our book on creating embedded systems. This book will walk you through all the stages of requirements, architecture, component selection, schematics, layout, and FPGA / software design. We designed and manufactured the board at the heart of the book! The schematics and layout are available in Altium here. Learn more about the board (see previous blogs on Bring up, DDR validation, USB, Sensors) and view the schematics here.
All words in this blog were written by a human.

