It is always exciting when new devices are introduced, and this week, AMD Xilinx announced two new devices into the already popular Artix and Zynq UltraScale+ families.
Both devices fall within the cost-optimized portfolio and are intended to fill gaps in current product offerings.
If you aren’t familiar with the cost-optimized portfolio, it covers both the 7 series and UltraScale+ range of devices and also all the Spartan and Artix-7 families along with Zynq devices below Z-7020. In the UltraScale+ family, the cost optimized portfolio includes the Artix UltraScale+ range and Zynq UltraScale+ devices up to and including the ZU3.
The first of the new devices is the Artix UltraScale+ AU7P. This device will be the smallest in the Artix UltraScale+ range offering 82 K logic cells. When compared to the previous smallest member of the Artix UltraScale+ family (the AU10P), the AU7P offers 50% less static power, twice the number of HDIO, and 1.2x increase in terms of memory and IO to logic ratio. Another advantage of the AU7P device is the inbuilt MIPI DPHy which provides a lower cost BOM, easier PCB layout, and support for higher MIPI lane rates. The transceivers provided with the AU7P support operation up to 12.5 Gbps, enabling us to get data on and off chip easier.
Personally, I think the AU7P is going to be an interesting device for applications looking for the sweet spot between cost and performance, especially in image processing and battery powered applications.
The second device that was introduced is very interesting to me. The ZU3T is an evolution of the popular ZU3EG in the Zynq UltraScale+ MPSoC family and introduces not only 12.5 Gbps programmable logic transceivers, but also UltraRAM. Of course, all Zynq UltraScale+ devices have PS transceivers to implement USB 3.0 and Display Port etc.
Since many of my development boards including the Ultra96, UltraZed, and Genesys ZU are ZU3 based, it would be great to have a ZU3 sized device with transceivers, especially for some of our image processing projects. It would be nice, for example, to see a UltraZed ZU3T with the transceivers broken out. This would provide a nice compliment to the existing ZU3EG and ZU5EV range.
The ZU3T offers 157 K logic cells, eight 12.5 Gpbs PL transceivers, and 14 Mb of UltraRAM. Compared to the ZU4CG/EG which was the previous device selected if PL transceivers were required, the ZU3T offers reduced static power and significant benefits over the ZU3 with more DSP and memory elements provided.
Again, I think the ZU3T will fit in a nice home when lower logic resources and transceivers are both required when working with high-speed ADC and DACs, for example. Coupled with the UltraRAM, this makes the component very powerful.
After reviewing both the AU7P and the ZU3T, I think these new devices show a commitment to broaden the cost-optimized portfolio offerings which address use cases previously requiring a larger device. The addition of these devices provides developers with devices that are just the ticket for many applications.
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