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Recently I retired my old trusty TI85 calculator and replaced it with a more modern scientific calculator, which could even run python....

One of the devices we often use for our client space projects is the PolarFire and PolarFire SoC. Over the years we have done several...

I thought I would kick off 2025 with a look back at what we had achieved over the last year, it has been one of my busiest years yet and...

Not everything we do is FPGA-related; we often design boards and develop embedded software applications. More often than not, the project...

One of the boards purchased in 2024 which was sat in my backlog was the Microchip Curiosity Nano evaluation kit. This board contains a...

Normally, we clock the logic within our FPGA design using clocks either provided externally or generated internally using MMCMs, PLLs, or...

A couple of weeks ago I started exploring, fixed and floating point math and the differences between them in FPGA implementations. Of...

As many engineers are, I am a big fan of sci fi, growing up I used to watch Star Trek The Next Generation religiously every night here in...

I have written several blogs about setting up and running your own company ( P2 here ) , the software tools and IT infrastructure ...

When it comes to debugging designs the more visibility and control we have over debugging elements such as ILAs is critical.   When we...

In our last instalment we configured the tool chain and started the creation of the example design for the Agilex 5E Premium development...

Last week we examined how we could use the IEEE VHDL 2008 fixed and floating packages to implement a simple polynomial approximation.  ...

Over this series of blogs we have explored the Altera Agilex 5 devices and their architecture. Of course nothing beats getting hands on...

A short time ago I hosted a webinar which looked at how we can implement mathematics within programmable logic. In this webinar we...

When developing FPGAs there is a critical triad which needs to be achieved for the successful delivery of a project. First we need to...

One of the many uses of FPGAs is in implementing bespoke communication protocols. At Adiuvo we do a lot of work in the space and high...

Every digital / FPGA designer should be aware of clock domain crossing between asynchronous clock domains. As our devices get more and...

One of the main challenges FPGA designers face, especially those new to FPGA design is how to achieve timing closure. While it seems...

The goal of professional FPGA development is to deliver projects on quality, on time, and within budget. Achieving this, however, can be...

One of the things I enjoy is when people reach out with suggestions for blogs and projects that would help them. A recent suggestion was...