We often use finite state machines (FSM) when we want to implement control structures in our programmable logic structures. As complexity of the FSMs increases though, they are difficult to debug and maintain so we may consider implementing a small microcontroller softcore.
There is a class of state machine, however, which offers a good compromise when it comes to implementing large FSM structures and is programmable. These programable state machines are implemented using microcode in Block RAMS and have address and control elements which execute commands. Perhaps one of the first programmable state machines was PicoBlaze, or as it originally started out, Ken Chapmans Programmable State Machine.
Using a programmable state machine can provide several benefits over implementing a FSM in a traditional manner or implementing a softcore processor. The main benefit is that the desired behavior is abstracted because a higher-level language is used to describe the operation of the state machine. It is also much more efficient than implementing a softcore processor because the programmable state machine is sized depending upon the program.
I recently came across Hotstate which is a programmable state machine and allows engineers to define FSM behavior using a subset of C called Comma C. This subset of C enables developers to implement branching, looping, and limited function calls.
The development flow to implement Hotstate is as follows:
Capture the desired behavior using Comma C.
Compile the Comma C file using the Hotstate compiler. This compiler can generate the memory files, analysis data, and Verilog template which customizes the implementation.
Simulate the Hotstate machine RTL to ensure behavior is as expected. A test bench for this can be generated by the Hotstate compiler.
Import the Hotstate source files into your Vivado project.
Integrate the Hotstate design into your Vivado design.
Simulate your complete design to verify the performance of the state machine.
Implement solution in your board.
One very nice thing about the Comma C design entry is that it can be debugged using GDB just as we would any other software application.
The architecture of the Hotstate machine implemented within the FPGA contains several timers and input LUT, along with the stack, address decoding, and microcode execution as seen below.
The input LUT enables logic expressions to be solved to help control the flow. If the Comma C design does not use the resources, the compiler does not generate them enabling a reduced logic implementation.
You can download a free version of Hotstate which comes with several different examples. One of complete examples that is targeted to the Kria KV260 is the parser example. This provides a full Vivado project which can be implemented and deployed on the KV260 as an example.
The example also includes an example test bench which demonstrates how you can use Vivado simulator to test the behavior of the state machine.
I will discuss Hotstate again soon with a more detailed step-by-step guide because I think a small, compact yet performant programmable state machine will provides developers with an interesting solution. Programmable state machines like Hotstate enable developers to implement more complex behavior with reduced implementation risk.