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Writer's pictureAdam Taylor

Logic Gates and Boarding Gates.

A few weeks ago, someone asked me on LinkedIn if I would write a blog about what I do on an average day. The reality is that since running my own company, each day is very different. Some days I spend most of the day writing a blog or article (despite always thinking that circa 1000 words would take less time). Others, I spend designing FPGAs for clients or creating Hackster projects, while other days are spent doing business development and administration.

While I think a "day in the life" idea wouldn't work, I thought I would write a blog about what I have been up to in the last month (June 2024). It has been a jam-packed month, and as I reflect on it, I am not sure how I fitted it all in. But it has also been a good month work-wise.


PCB East Conference in Boston


This month started off with a trip to Boston, MA for a conference, PCB East. This was my first time at PCB East, and I was talking about how to design an FPGA into your PCB Design. After an introduction to FPGAs for the attendees, who were mostly EE and PCB Layout engineers, we examined how we could leverage the FPGA IO Structures to ease PCB Integration, how we could leverage pin planning projects, and most importantly, how we could initially estimate the device we might need along with the power. Boston is one of my favorite cities, so I flew in a few days early at the weekend to explore, as the last time I was there was 2019.

While at PCB East, I used the isolation of being away from the office to make a start on a few projects that I had to work on. One of those was a review for a client in the US, examining their RF decoder implemented in an FPGA. The others were internal projects looking at the Cologne Chip Gate Mate and the new ILA. I also started the development of a new circuit board, our S7 Tile. The S7 Tile contains an AMD Spartan 7 device and is designed to enable projects that need an FPGA to make a rapid head start.


I am excited about the S7 Tile; the layout is now completed, and we are expecting the first prototypes back in the next week or two for bring-up and commissioning. I am going to tempt fate, but they are heavily based on our Leonidas board, so the technical risk is low.



Weekend with Beaver Scouts


In between PCB East and my next trip to DAC in San Francisco was a weekend camping with 90 Beaver Scouts (aged 6 to 8). We did a range of activities from climbing to tobogganing and caving in an old coach. Despite the encouragement from leaders and parents, I decided I was not slim enough to navigate the twists and turns of the caving bus, though I was tempted. Luckily, while there were a lot of rain showers, the weather was still pretty good overall.



DAC in San Francisco


Next up was DAC, where I was with a longstanding client, Blue Pearl Software, on their stand. Over the years, we have used Blue Pearl's Visual Verification Suite to help us as part of our design verification for our space missions and generally on FPGA developments.


I was only in San Francisco for 4 days—a literal flying visit and the first time in years of flying into SFO that I headed to the city and not San Jose.



Another nice advantage of being in San Francisco was the ability to meet up with a client I have been mentoring one-on-one on the Zynq / Zynq MPSoC over the last 6 months. Dinner was nice, then we went for a long walk talking FPGA as we walked (climbed!) the streets to Coit Tower. While the walk was rather tiring (I need to get out and do more exercise), the views were fantastic.


FPGA Conference in Munich


The final thing I needed to do was create a 2-hour-long live lab for FPGA conference in Munich, Germany. Not that I left creating the slides until the last minute, of course. In this class, we walked through live creating a target for the Avnet ZU Board.

All told, it was a crazy busy but very productive and fun month. Along the way, I even met a few fans of the blogs at the conferences.


Monthly Summary


Totalling it all up, I think in June I managed to achieve the following:


  • 8 technical blogs on FPGAs of various kinds.

  • 1 technical article on embedded Linux.

  • 3 days (16 hours each) bringing up a Space Board for which we designed both the FPGA and PCB. So far, it is going well.

  • Wrote two Hackster projects.

  • Wrote a two-hour live tutorial with step-by-step instructions for FPGA Conference.

  • Designed the schematics for the S7 Stamp and worked with a good friend to lay them out.

  • Performed a technical review of an RF down-converting FPGA and wrote a report on my findings.

  • Developed an FPGA module which interfaced with a PCIe TLM interface.

  • Wrote slides for a technical webinar on debugging timing issues.

  • Commissioned 10 Leonidas boards for DAC / giveaways at conferences.

  • Did the standard business development to ensure we have a pipeline going forward.

  • Ensured the wider team was focused on what needed to be done for other clients.

  • Flew 18,660 miles on British Airways – thankfully for my sanity and comfort all in business or first.


Now, I have a few months back in the office to work on some more detailed projects, including some exciting AI and ML projects on the S7 Tile.


Workshops and Webinars


If you enjoyed the blog why not take a look at the free webinars, workshops and training courses we have created over the years. Highlights include



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Embedded System Book   


Do you want to know more about designing embedded systems from scratch? Check out our book on creating embedded systems. This book will walk you through all the stages of requirements, architecture, component selection, schematics, layout, and FPGA / software design. We designed and manufactured the board at the heart of the book! The schematics and layout are available in Altium here   Learn more about the board (see previous blogs on Bring up, DDR validation, USB, Sensors) and view the schematics here.



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