Adam TaylorApr 26, 20233 minMicroZed Chronicles: Vivado Simulator Code and Functional CoverageWhile writing the HDL is often the easy element of FPGA development, the most challenging and time-consuming element can be verification....
Adam TaylorJan 11, 20238 minMicroZed Chronicles: From UART to AXI Lite Debug AccessLast week we examined how we could create a UART with AXI Stream interfaces to enable access to AXI buses in device for debugging. In...
Adam TaylorDec 30, 20223 minUsing RPI Pico for System & FPGA Integration Several times in recent blogs and posts on LinkedIn and Twitter I have mentioned that at Adiuvo we use a lot of RPI Pico’s for hardware...
Adam TaylorSep 7, 20225 minMicroZed Chronicles: Getting Started with Cocotb Verification of both the modules and top-level testing is often more complex and time consuming than creating the HDL. Previously, we’ve...