High-Level Synthesis can provide us a significant advantage when we are working in the data plane (e.g., signal / image processing and...

Space electronics is one of the main areas my consultancy is very active. SpaceWire is a differential high-speed communications protocol...

Embedded systems use a lot of diverse sensors from accelerometers and gyroscopes to magnetometers, vibration, temperature and humidity....

The Kria K26 SOM and the Kria KV260 Vision AI Starter Kit have received interest for developing image processing and AI applications....

Over the last few weeks, I have had several emails and messages about mitigating the impact of the component shortage by transitioning...

Recently we examined Industrial Input and Output drivers in PetaLinux when using an ADC on a Pmod. Of course, all Xilinx devices also...

As a practicing engineer, I spend a lot of time developing space or other high-reliability applications. I mention this because we need...

One of the many advantages to using an embedded Linux solution is the lower-level drivers are often part of the kernel. This saves us...

I have talked about my love of PYNQ for rapid prototyping of applications both commercially and for fun projects on several occasions in...

We have looked at many development boards that are based on Xilinx FPGAs and SoCs during the eight years this blog has been running....

The Kria KV260 Vision AI Starter Kit is great for embedded vision applications and AI acceleration. Several of my clients, however, have...

A few weeks ago, Xilinx released Vitis AI 1.4. This was around the same time I was working on a project with the Kria SOM for a client on...

Over the years, several blogs and projects have leveraged the Vivado and Vitis ability to generate example projects. One of the most...

The first-ever MPSoC I received to work and create blogs with was an engineering sample of the UltraZed-EG in red. It worked well, but...

If I’m being honest, my university classes on control engineering were not my favorite. However, working as an engineer – and especially...

Back on the 29th September 2013, I sat down and wrote what would become the first blog in this series. It was a simple look at how to...

Last week we examined several techniques for generating non-integer clock divisions in our FPGA if no PLL was available or we couldn’t...

Modern FPGA devices really spoil us. They include PLLs, DCM, DSP etc. and a range of interfaces that significantly ease our developments....