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MicroZed Chronicles: Sysmon and I2C access
XADC as part of a temperature reporting system which allowed me to demonstrate the power of using a model based approach. One of the...
Aug 7, 20244 min read


MicroZed Chronicles: Avnet K24 I/O Development Kit.
Regular readers will know I am big fan of the System of Module approach, we design many into systems and solution for out clients and if...
Jul 31, 20244 min read


MicroZed Chronicles: Simulink & Model Based Design.
One of things which helps us accelerate our development times is to leverage model based development. This enables us to work at a higher...
Jul 24, 20245 min read


MicroZed Chronicles: Alveo Edition: High Bandwidth Memory.
Over a Over a series of blogs we have been exploring the Alveo V80 board, the Alveo Versal Example Design (AVED) its constituent parts...
Jul 19, 20244 min read


MicroZed Chronicles: Technical Risk and Technology Readiness Levels
FPGAs are commonly used across a range of applications from Space, and Aerospace to Automotive, Robotics, and Commercial applications....
Jul 17, 20245 min read


Logic Gates and Boarding Gates.
A few weeks ago, someone asked me on LinkedIn if I would write a blog about what I do on an average day. The reality is that since...
Jul 16, 20245 min read


MicroZed Chronicles : QDMA and the V80
So far on our journey of exploring the Alveo V80 we have examined the hardware and software elements necessary for creating the AVED...
Jul 12, 20243 min read


MicroZed Chronicles: Automatically Adding Build Version.
Last week we examined how we could work with Git and source control on our FPGA designs. Along with working with Git for source control,...
Jul 10, 20245 min read


MicroZed Chronicles: Working with Vivado and Git
One of the skills which FPGA developers need to master is that of working with source control tools such as git. A few months ago I...
Jul 3, 20244 min read


MicroZed Chronicles: Delta Sigma DAC Part One
One of the things I love about all AMD FPGA and SoC devices is the inclusion of the XADC / Sysmon ADC. This allows us to monitor not only...
Jun 26, 20244 min read


Delving into Renesas ForgeFPGAs: Tool Chain and Dev Board Walk Through
In our previous blog we introduced the Renesas ForgeFPGA, in this blog we are going to walk though the creation of a simple project using...
Jun 25, 20243 min read


Delving into Renesas ForgeFPGAs: A Primer on Low-Density Logic Solutions
One of the FPGAs I have wanted to examine since it was announced is the new Renesas ForgeFPGA. These devices offer developers a...
Jun 21, 20243 min read


MicroZed Chronicles: The Importance of Establishing Clear Requirements
Over the years, I have worked on a range of engineering projects in various roles, from being the FPGA engineer, hardware engineer to the...
Jun 19, 20245 min read


GateMate Integrated Logic Analyser
Over the last few months we have been experimenting with the Colonge Chip GateMAte FPGA on the original development board along with the...
Jun 17, 20244 min read


MicroZed Chronicles: Alveo Edition, Alveo Versal Example Design, Management Controller.
One of the major differences with the Alveo V80 accelerator card is the implementation of the satellite controller. The satellite...
Jun 14, 20243 min read


MicroZed Chronicles: MicroBlaze V MCS
Last week, we examined the new MicroBlaze V , which is based on the popular RISC-V RV32I Instruction Set Architecture. This enabled me to...
Jun 12, 20244 min read


MicroZed Chronicles: Introducing the MicroBlaze Risc-V
One of the things I have been very excited about recently is the MicroBlaze RISC-V or MicroBlaze V as it will be known. The MicroBlaze V...
Jun 5, 20244 min read


MicroZed Chronicles: Writing RTL for Timing Closure
Last week, we looked at how we could create a baseline timing closure , which hopefully helps with achieving timing closure. Of course,...
May 29, 20245 min read


MicroZed Chronicles: Alveo Versal Example Design
In our first blog and introduction to the new Alveo V80, we examined the features and capabilities of the board itself. In this blog we...
May 24, 20243 min read


MicroZed Chronicles: Tackling Timing.
There are many factors that come together to create a successful FPGA design. Not only do we need to have a sensible architecture, IP...
May 22, 20244 min read
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