Over the twelve years of this blog, we have looked at many different tools for developing FPGA and SoC designs. Many we use often, such as Vivado, Vitis, and PetaLinux. Others, over the years, have been merged into or evolved into new products, for example SDSoC. One tool we have only touched on is Vitis Model Composer. This add-on for MATLAB and Simulink provides developers with a number of HDL and HLS blocks which can be connected to create FPGA solutions. Vitis Model Compo

I am very interested in higher levels of abstraction for developing FPGAs and especially algorithms like image processing and control....