I spend a lot of time reading forums and social media related to FPGA. Recently I was reading r/fpga and saw some interesting interview questions someone had been asked at a finance company. There were two questions. 1. You have a 100 MHz reference clock and another clock with an unknown frequency. Design a circuit to measure the unknown frequency. 2. Given a one cycle input pulse, generate an output that stays high for ten clock cycles in total, the input cycle plus nine mor