FPGA Horizons London- October 6th and 7th 2026 - get Tickets here. The $99 Artix UltraScale+ Explorer Board - learn more here Last week we looked at whether a language model running entirely on a machine on my desk could generate RTL that compiles. The short answer was yes, with the caveat that a compile pass means the code parses and elaborates and nothing more or as one comment on linkedin put it “It compiles, so let's ship it!! Exactly my sense of humour” That of course wa

FPGA Horizons London- October 6th and 7th 2026 - get Tickets here. The $99 Artix UltraScale+ Explorer Board - learn more here One of the questions I get asked the most at the minute is whether AI can actually help us with our RTL development. I have spoken several times about how frontier models can help us, and how our role as engineers is evolving as we are able to leverage higher levels of abstraction. However, while frontier models are excellent, for many of us working in

FPGA Conference - FPGA Horizons US East - April 29th, 30th 2026 - THE FPGA Conference, find out more and get Tickets here . Recently, we have looked at how we can use AI in our RTL development and in our software development within Vitis . AMD is also going to be running a very interesting tutorial on upcoming AI features within FPGA at FPGA Horizons US . This got me thinking that I should write a little more about how I am using it and the flow I am using in my developments