Over the last 13 years, I have written so many blog posts on a wide range of topics that sometimes I wonder if I am repeating myself. However, this is something I have wanted to discuss for a while, and a search did not reveal that I had covered it previously. When designing with FPGAs, we are always looking for the most efficient way to implement our requirements using the resources available within the device. Combinational logic is implemented using LUTs, shift registers c