These are the archives of the MicroZed Chronicles, a weekly blog exploring aspects of FPGA design. Check out to the Adiuvo Engineering Blog for the latest MicroZed Chronicles posts as well as other embedded design topics. 

Access code examples from most of the chronicles here. 

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See more in depth Hackster.io projects here 

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Issue 399 A Blast from the past - Clock switching

Issue 398 A Blast From the Past - Non Integer Clock, with no PLL

Issue 397 Designing in DDR to a Custom Design

Issue 396 Estimating FPGA Development Times 

Issue 395 Multi Gigal Bit Transceivers 

Issue 394 Kria SoM Applications 

Issue 393 RFSoC Studio PYNQ

Issue 392 Hands on with the KRIA SoM

Issue 391 Custom Board Bring up, What to do if it does not work

Issue 390 Pynq Register Maps

Issue 389 KRIA SoM 

Issue 388 Fun with the Basys 3 Development board

Issue 387 Custom Zynq Development I2C, Petalinux in PS and AXI

Issue 386 Custom Zynq Development USB validation

Issue 385 MIPI Imaging on Zynq 7000 Part Two

Issue 384 MIPI Imaging on Zynq 7000 Part One

Issue 383 Validating Custom Zynq DDR Implementations

Issue 382 Configuring a Custom Zynq Design 

Issue 381 What to do when your Zynq does not boot

Issue 380 Versal Hello World 

Issue 379 TYSoM and PYNQ 

Issue 378 OpenCL Host Kernel Integration

Issue 377 Getting Started with OpenCL

Issue 376 Setting Up Alveo U50

Issue 375 GHDL and UVVM Framework 

Issue 374 Installing and Working with GHDL for Verification

Issue 373 Vitis HLS and Silexica's SLX Plugin

Issue 372 Implementing Safe State Machines with Vivado

Issue 371 ZynqBerry Zero

Issue 370 Taking a Look Inside the Tektronix TBS1052C

Issue 369 Using Analysis View in Vitis and Vivado HLS

Issue 368 Vivado / Vitis / Pynq / Arm Design Start Free Online Virtual Workshops

Issue 367 Verifying AXI Stream Peripherals 

Issue 366 Verifying AXI Peripherals 

Issue 365 A look at the Trenz TE0802

Issue 364 Using C Test Benches with XSIM

Issue 363 Introduction to RTL and XSIM

Issue 362 RTL Design Verification Techniques 

Issue 361 UltraFast Design Methodologies

Issue 360 Quality of Result Report

Issue 359 Design Analysis Report

Issue 358 How do you architect your system

Issue 357 Back to Basics in Vivado 2020.1 SW Debugging 

Issue 356 Back to Basics in Vivado 2020.1 SW Creation in Vitis

Issue 355 Back to Basics Zynq Project Creation in Vivado 2020.1

Issue 354 Debugging Arm M1 / M3 Cores 

Issue 353 HLS Focusing on Timing and II Violations

Issue 352 Vivado Waivers 

Issue 351 PetaLinux Image Processing Part 2

Issue 350 PetaLinux Image Processing 

Issue 349 Device Trees

Issue 348 Creating PYNQ for MicroZed

Issue 347 PYNQ Features 

Issue 346 Arm M1 Timing 

Issue 345 Arm M1 from Scratch SW

Issue 344 Arm M1 from Scratch 

Issue 343 HLS Delays and Triggers 

Issue 342 High Speed Imaging with HLS 

Issue 341 Vivado HLS Image processing Heads Up Display

Issue 340 Image processing on the SP701 Board 

Issue 339 HLS Advanced Image Processing and PYNQ

Issue 338 Creating Video Streams with Vivado HLS 

Issue 337 SP701 Sensor Application

Issue 336 Spartan 7 and the SP701

Issue 335 Upgrading projects from SDK to Vitis

Issue 334 PYNQ in Development

Issue 333 Sensor Demosaic and Gamma LUT Deep Dive

Issue 332 UltraRAM 

Issue 331 Vitis Emulation

Issue 330 MicroBlaze and Vitis 

Issue 329 Vitis platform creation for Zynq7000 devices 

Issue 328 RFSoC Explorer 

Issue 327 Vitis Application Deep Dive

Issue 326 Vitis Acceleration Flow – Software Platform Creation

Issue 325 Vitis Acceleration Flow – Hardware Platform Creation 

Issue 324 Vitis Creating a Linux VM

Issue 323 Vitis HLS

Issue 322 Vitis Libraries

Issue 321 Getting started with Vitis – Embedded Flow 

Issue 320 Getting Up and Running with RTEMS on the Ultra96

Issue 319 Power Analysis with PYNQ and PMBus

Issue 318 Accessing PMBus using PYNQ

Issue 317 PYNQ IOP Deep Dive

Issue 316 XDF and VITIS

Issue 315 HLS Optimization & Analysis 

Issue 314 Working with HLS Loops

Issue 313 Updating Block RAM with out Re Implementation

Issue 312 Alveo 

Issue 311 Ultra96 Click Mezzanine, SPI and I2C

Issue 310 Working with industrial Interfaces

Issue 309 Rapid Wright an introduction 

Issue 307 PYNQ, RFSoC & SDFEC

Issue 306 Accelerating IP Creation with Model Composer

Issue 305 Display Port Controller Part 2

Issue 304 Display Port Controller Part 1

Issue 303 NEON & SIMD

Issue 302 Error Correction and BRAM

Issue 301 PYNQ Edition! Creating your own overlay

Issue 300 Inter Processor Communication Part 3

Issue 299 Inter Processor Communication Part 2

Issue 298 Mailboxes and MUTEX for Inter Processor Communication

Issue 297 PYNQ Edition! Creating FSMs in the PL with Python

Issue 296 Clock Monitoring

Issue 295 Ultra96 and the Click Mezzanine board

Issue 294 MicroBlaze, Linux, MQTT and IoT Frameworks

Issue 293 Using Cortex-M1 and Cortex-M3 with Arm DesignStart

Issue 292 PYNQ Edition! Interfacing with Pmods, Arduino and R Pi

Issue 291 FPGA MultiBoot and update in the field 

Issue 290 Zynq Multiboot and in the field update

Issue 289 Petalinux, the XADC and Industrial Input Output (IIO)

issue 288 PYNQ Edition! Signal Generation and Logic Tracing

Issue 287 Petalinux, MicroBlaze and Ethernet

Issue 286 Understanding HLS Interfacing Options 

Issue 285 PYNQ Edition! Building PYNQ Images

Issue 284 Deep Dive of the Deep Learning Processor Unit 

Issue 283 Building PetaLinux for the MicroBlaze Part 2  SW Build 

Issue 282 Building PetaLinux for the MicroBlaze Part 1 HW build

Issue 281 PYNQ Edition! Introduction to PYNQ

Issue 280 Working with SDK Repositories and Modifying Drivers 

Issue 279 Deep Dive of the RFSoC Data Converter

Issue 278 RFSoC & Pynq 

Issue 276 Pin Planning using Vivado

Issue 275 Using SPIDev in Petalinux 

Issue 274 Building Petalinux with no BSP

Issue 273 Working with the Zynq MPSoC PS FPD & LPD DMA

Issue 272 Designing with Power Constraints

Issue 271 Running MicroBlaze from a Zynq or Zynq MPSoC PS DDR

Issue 270 Deephi – DNNDK – Deep Learning Acceleration

Issue 269 Using xfOpenCV in Standalone mode

Issue 268 Connecting to AWS IoT with FreeRTOS

Issue 267 Working with QSI / SPI with Serial Flash Libraries

Issue 266 Working with I2C

Issue 265 Working with MIPI

Issue 264 HLS Tips and Tricks Part Two

Issue 263 HLS Tips and Tricks Part One 

Issue 262 SDSoC and C Callable Libraries 

Issue 261 Working with source control

Issue 260 Pynq on the Ultra96

Issue 259 Building PetaLinux for the MiniZed 

Issue 258  Zynq MPSoC & Inter Processor Interrupts

Issue 257 XDF and Versal 

Issue 256 RFSoC and the ZCU111

Issue 255 Using Isolation Flow in Vivado

Issue 254 Trigger State Machine and the ILA 

Issue 253 Zynq MPSoC EV Video Codec Unit 

Issue 252 Triple Modular Redundancy & MicroBlaze

Issue 251 Using SDSoC with MicroBlaze

Issue 250 Ultra96 creating webapps and projects

Issue 249 MPSoC Leveraging the Configuration Security Unit

Issue 248 DSP48 SIMD for power and area optimisation

Issue 247 Machine Learning on the Ultra96 

Issue 246 Creating PetaLinux for the Ultra96

Issue 245 BRAM Optimisations

Issue 244 A look at the Ultra96 Board

Issue 243 HLS Sobel implementation 

Issue 242 Xilinx Parameterized Macros

Issue 241 HLS for Image Processing

Issue 240 Creating a Zynq or FPGA-Based, Image Processing Platform

Issue 239 Vivado HLS and DDR Access

Issue 238 FSM Tips 

Issue 237 Pynq Computer Vision Overlay

Issue 236 Maximising Reuse in Vivado Designs 

Issue 235 XADC AXI Streaming and Multi Channel DMA 

Issue 234 MPSoC UltraZed Edition – OpenAMP Between A53 & R5

Issue 233: XDAC AXI Streaming and DMA

Issue 232: Cross Triggering between PS and PL when Debugging

Issue 231: How to create Embedded Vision – 45 Minute Video

Issue 230: Tips for better AMS

Issue 229: Tips for an Image Processing System 

Issue 228: Verifying Video Images in PS DDR – Creating BMP 

Issue 227: A look at Blue Pearl 

Issue 226: JTAG to AXI Bridge 

Issue 225: Advanced System Debugging with Micrium’s μC/Probe

Issue 224: System Debugging with Micrium’s μC/Probe

Issue 223: Video Mixing 

Issue 222: MPSoC UltraZed Edition – Watchdogs

Issue 221: MicroBlaze Booting from NV RAM 

Issue 220: HDMI TMDS Direct Decoding in FPGA 

Issue 219: MPSoC UltraZed Edition – Building PetaLinux

Issue 218: MPSoC UltraZed Edition – PL to PS VDMA

Issue 217: Answering SPI questions on the Zynq & Zynq MPSoC

Issue 216: HDMI Rx using ADV7611 & HDMI FMC App SW 

Issue 215: HDMI Rx using  ADV7611 & HDMI FMC Vivado Build

Issue 214: How to address VDMA Issues

Issue 213: MiniZed, FLIR Lepton & 7-Inch touch display

Issue 212: MiniZed, FLIR Lepton & IOT

Issue 211: HDMI Sink and Source 

Issue 210: MPSoC UltraZed Edition – Xilinx Power Management Framework Library

Issue 209: MPSoC UltraZed Edition – Platform Management Unit 

Issue 208: MiniZed WIFI,  Bluetooth & First program

Issue 207: MiniZed Intro and WIFI bring up

Issue 206: Diligent Nexys Video SW – Microblaze

Issue 205: FLIR Lepton Part 2 

Issue 204: Diligent Nexys Video HW – MicroBlaze

Issue 203: FLIR Lepton & Zynq 

Issue 202: SDK AXI performance monitoring 

Issue 201: SDK Performance Analysis and Profiling 

Issue 200: MPSoC UltraZed Edition – PS, PL Interfacing 

Issue 199: AD9467 SDSOC Platform 

Issue 198: Sampling at 250 MSPS AD9467

Issue 197: MPSoC UltraZed Edition – Real Time Processing Unit Modes

Issue 196: SDSoC and Levels of Abstraction 

Issue 195 : PCAP and DevC  Interface 

Issue 194: MPSoC UltraZed Edition – Interrupt Example 

Issue 193: Answering a question on EMIO and the PL

Issue 192: Pmod what if there is no driver

Issue 191: MPSoC UltraZed Edition – Interrupts 

Issue 190: Booting from TFTP 

Issue 189: XADC Simultaneous Conversion 

Issue 188: Pmods and how to use them 

Issue 187: MPSoC UltraZed Edition – Real Time Clock

Issue 186: TySOM Face Detection – SDSoC

Issue 185: MPSoC UltraZed Edition – PS RTC 

Issue 184: TySOM Face Detection HW Deep Dive

Issue 183: TySOM and Face Detection

Issue 182: XADC External Multiplexing

Issue 181: MPSoC UltraZed Edition – PS Clocking 

Issue 180: reVision Stack Machine Learning Introduction

Issue 179: MPSoC UltraZed Edition – AMS PL Sysmon

Issue 178: MPSoC UltraZed Edition – AMS PS Sysmon R5 & A53

Issue 177: reVision Stack Intorduction

Issue 176: Video Timing Controller Synchronization

Issue 175: MPSoC UltraZed Edition – Sysmon and AMS Introduction 

Issue 174: MPSoC UltraZed Edition – Memory Map

Issue 173: TTC Event Timers

Issue 172: MPSoC UltraZed Edition – Hello World 

Issue 171: OpenAMP Part 2 Example & PetaLinux Build

Issue 170: MPSoC UltraZed Edition – Vivado Build 

Issue 169: OpenAMP Introduction

Issue 168: MPSoC UltraZed Edition Part 1 

Issue 167: PWM and RC Servo SW 

Issue 166: PWM and RC Servo 

Issue 165: Power Management Part 3

Issue 164: Power Management Part 2

Issue 162: Power Management Part 1

Issue 161: Pynq (Python + Zynq) SDSoC Integration 

Issue 160: Pynq (Python + Zynq) SDSoC Platform 

Issue 159: Pynq (Python + Zynq) SDSoC and Python

Issue 158: Pynq (Python + Zynq) Creating your own overlay 

Issue 157: Pynq (Python + Zynq) Exploring the Base Overlay

Issue 156: Pynq (Python + Zynq) Hardware Overlays

Issue 155: Pynq (Python + Zynq) Dev Board

Issue 154: SDSoC Tracing Performance

Issue 153: SDSoC Performance Profiling 

Issue 152a: ZynqBerry Getting the Raspberry Pi Camera up and running – Video

Issue 152: ZynqBerry SDSoC Example

Issue 151: ZynqBerry SDSoC Hello World

Issue 150: ZynqBerry

Issue 149: Camera Link

issue 148: Cracking Open HLS Part 5

Issue 147: Cracking Open HLS Part 4

Issue 146: Cracking Open HLS Part 3

Issue 145: Cracking Open HLS Part 2

Issue 144: Cracking Open HLS part 1

Issue 143: Getting Down with Embedded Vision Algorithms

Issue 142: OpenCV and Object Tracking Part 2

Issue 141: OpenCV and Object Tracking Part 1

Issue 140: Zedboard Single Board Computer & Installing OpenCV

issue 139: Linux and File Systems

Issue 138: Linux, Device Tree and Zynq SoC PL

Issue 137 : Snickerdoodle – Hello World & Wireless Transfer

Issue 136: Snickerdoodle – Getting it up and running and connected to WIFI

Issue 135: Snickerdoodle – Introduction 

Issue 134: LabVIEW FPGA – Test Bench Overview

Issue 133: LabVIEW FPGA – First Project 

Issue 132: LabVIEW FPGA Using Eclipse and C 

Issue 131: LabVIEW FPGA & NI RIO Part 2 

Issue 130: LabVIEW FPGA & NI RIO

Issue 129: Incremental Compilation

Issue 128: Out Of Context Synthesis

Issue 127: Deep Dive of the EVK Control Interfaces

Issue 126: EVK looking at the status of the Camera Receiver

Issue 125: Creating the EVK Camera Software

Issue 124: Creating the EVK Camera Hardware Build

Issue 123: Using the Returned  Peripheral Status 

Issue 122: Embedded Vision Kit 7 Inch Display Software Build

Issue 121: Embedded Vision Kit 7 Inch Display Hardware Build

Issue 120 Embedded Vision Kit 7 Inch Display Introduction

Issue 119: VDMA and Test Pattern SDK Software

Issue 118: VDMA and Test Pattern Vivado Hardware

Issue 117: Hardware in the loop –  ILA and SDK 

Issue 116: Test Pattern Generation

Issue 115: Embedded Vision Kit – Deep Dive

Issue 114: Embedded Vision Kit – Initial Power Up

Issue 113: SDSoC FIR Filters – High Pass / Band Pass and Band Stop 

Issue 112: SDSoC FIR Filter PL

Issue 111: SDSoC FIR Filter PS

Issue 110: SDSoC Coherent Sampling and FFT Size

Issue 109: SDSoC Creating your own Platform Part 2 – Pre 2015.4 Versions

Issue 108: SDSoC Creating your own Platform – Pre 2015.4 Versions

Issue 107: XADC, Interrupts & Real Signals

Issue 106: Interrupt Latency Part 2

Issue 105: Interrupt Latency

Issue 104: XADC in the Real World

Issue 103: SDSoC and ADC

Issue 102: SDSoC AES FreeRTOS Example – Includes how to run FreeRTOS on the MicroZed

Issue 101: SDSoC AES Bare Metal

Issue 100: 100th Blog

Issue 99: SDSoC Estimation 

Issue 98: SDSoC AES Example Part 5 

Issue 97: SDSoC AES Example Part 4

Issue 96: SDSoC AES Example Part3

Issue 95:  SDSoC AES Example Part 2

Issue 94: SDSoC AES Example Part 1 

Issue 93: SDSoC Part 9

Issue 92: SDSoC Part 8

Issue 91: SDSoC Part 7

Issue 90: SDSoC Part 6 

Issue 89: SDSoC Part 5

Issue 88: SDSoC Part 4

Issue 87: SDSoC Part 3

issue 86: SDSoC Part 2 

Issue 85: SDSoC Part 1

Issue 84: SPI Part 4

Issue 83: SPI Part 3

Issue 82: SPI Part 2

Issue 81: SPI Part 1

Issue 80 : lwIP Stack 

Issue 79 : Ethernet Part 3 

Issue 78 : Ethernet Part 2

Issue 77 : Ethernet Part 1

Issue 76: Constraints RPM

Issue 75: Physical Constraints – PBlocks

Issue 74: Physical Constraints 

Issue 73: Using boards other than the MicroZed

Issue 72: Multi Cycle Paths 

Issue 71: Clock Constraints Relationships and Metastability

Issue 70: Constraints Part Two, Clock Relationships and Metastability 

Issue 69: Constraints Part One

Issue 68: AXI DMA Part Three

Issue 67 : AXI DMA Part Two

Issue 66: AXI DMA Part One 

Issue 65: SDK Profiling Applications Part 2

Issue 64: SDK Profiling Applications Part 1

Issue 63: SDK Debugging Applications

Issue 62:  XADC AXI and DevC Interfacing 

Issue 61: PicoBlaze Part Six

Issue 60: PicoBlaze Part Five 

Issue 59: PicoBlaze Part Four

Issue 58: PicoBlaze Part Three

Issue 57: PicoBlaze Part Two

Issue 56: PicoBlaze Part One 

Issue 55: Linux on the Zynq

Issue 54: PetaLinux on the Zynq

Issue 53: Linux and SMP

Issue 52: One Year and free EBook

Issue 51: SW Interrupts between Cores 

Issue 50: Communicating between Cores using OCM AMP

Issue 49: Communicating between cores OCM

Issue 48: Bare Metal AMP

Issue 47: AMP on the Zynq

Issue 46: Using both Cores on the Zynq

Issue 45: FreeRTOS Task Creation

Issue 44: FreeRTOS on the Zynq

Issue 43: XADC and Alarms

Issue 42: Zynq Operating Systems Part Four – uc/OS-III

Issue 41: Zynq Operating Systems Part Three 

Issue 40: Zynq Operating Systems Part Two

Issue 39: Zynq Operating Systems Part One

Issue 38: Interrupt PL to PS

Issue 37: NeoPixel Demo Part Eight

Issue 36: NeoPixel Demo Part Seven

Issue 35:  NeoPixel Demo Part Six

Issue 34: NeoPixel Demo Part Five

Issue 33: NeoPixel Demo Part Four

Issue 32: NeoPixel Demo Part Three

Issue 31 NeoPixel Demo Part Two

Issue 30: NeoPixel Demo Part One

Issue 29: PS DMA Part Two

Issue 28: PS DMA Part One

Issue 27: Creating a PL Peripheral Part Seven

Issue 26: Creating a PL Peripheral Part Six

Issue 25:  Creating a PL Peripheral Part Five

Issue 24: Creating a PL Peripheral Part Four

Issue 23: Creating a PL Peripheral Part Three

Issue 22: Creating a PL Peripheral Part Two

Issue 21: Creating a PL Peripheral Part One

Issue 20: Triple Timer Counter Part Four

Issue 19: Triple Timer Counter Part Three

Issue 18: Triple Timer Counter Part Two

Issue 17: Triple Timer Counter Part One

Issue 16: Private Watchdog

Issue 15: Private Timer 

Issue 14: Timer, Clocks & Watchdogs

Issue 13: Interrupts Part Two

Issue 12: Interrupts Part One

Issue 11: GPIO Example

Issue 10: PS GPIO

Issue 9: Zynq MIO

Issue 8: XADC SW

Issue 7: XADC HW

Issue 6: Bootloader Part Two

Issue 5: Bootloader Part One

Issue 4: Running Programmes on the Zynq

Issue 3: Hello World

Issue 2: The SW Environment 

Issue 1: The Board Bring Up